SciELO - Scientific Electronic Library Online

 
vol.37 issue2Model-based implementation of self-configurable intellectual property modules for image histogram calculation in FPGAsResponse surface methodology for estimating missing values in a pareto genetic algorithm used in parameter design author indexsubject indexarticles search
Home Pagealphabetic serial listing  

Services on Demand

Article

Indicators

Related links

  • On index processCited by Google
  • Have no similar articlesSimilars in SciELO
  • On index processSimilars in Google

Share


Ingeniería e Investigación

Print version ISSN 0120-5609

Abstract

OCAMPO-HIDALGO, J.J. et al. A CMOS Micro-power, Class-AB "Flipped" Voltage Follower using the quasi floating-gate technique. Ing. Investig. [online]. 2017, vol.37, n.2, pp.82-88. ISSN 0120-5609.  http://dx.doi.org/10.15446/ing.investig.v37n2.62625.

This paper presents the design and characterization of a new analog voltage follower for low-voltage applications. The main idea is based on the "Flipped" Voltage Follower and the use of the quasi-floating gate technique for achieving class AB operation. A test cell was simulated and fabricated using a 0,5 μm CMOS technology. When the proposed circuit is supplied with VDD = 1,5 V, it presents a power consumption of only 413 μW. Measurement and experimental results show a gain-bandwidth product of 10 MHz and a total harmonic distortion of 1,12 % at 1 MHz.

Keywords : CMOS analog integrated circuit design; quasi-floating gate circuits; low voltage; micro-power..

        · abstract in Spanish     · text in English     · English ( pdf )