<?xml version="1.0" encoding="ISO-8859-1"?><article xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<front>
<journal-meta>
<journal-id>0012-7353</journal-id>
<journal-title><![CDATA[DYNA]]></journal-title>
<abbrev-journal-title><![CDATA[Dyna rev.fac.nac.minas]]></abbrev-journal-title>
<issn>0012-7353</issn>
<publisher>
<publisher-name><![CDATA[Universidad Nacional de Colombia]]></publisher-name>
</publisher>
</journal-meta>
<article-meta>
<article-id>S0012-73532016000400003</article-id>
<article-id pub-id-type="doi">10.15446/dyna.v83n198.53276</article-id>
<title-group>
<article-title xml:lang="en"><![CDATA[High performance control of a three-phase PWM rectifier using odd harmonic high order repetitive control]]></article-title>
<article-title xml:lang="es"><![CDATA[Control de alto desempeño de un rectificador PWM trifásico usando control repetitivo de alto orden]]></article-title>
</title-group>
<contrib-group>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Ramos]]></surname>
<given-names><![CDATA[Germán]]></given-names>
</name>
<xref ref-type="aff" rid="A01"/>
</contrib>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Melo-Lagos]]></surname>
<given-names><![CDATA[Iván Dario]]></given-names>
</name>
<xref ref-type="aff" rid="A02"/>
</contrib>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Cifuentes]]></surname>
<given-names><![CDATA[Jenny]]></given-names>
</name>
<xref ref-type="aff" rid="A03"/>
</contrib>
</contrib-group>
<aff id="A01">
<institution><![CDATA[,Universidad Nacional de Colombia Departamento de Ingeniería Eléctrica y Electrónica ]]></institution>
<addr-line><![CDATA[Bogotá ]]></addr-line>
<country>Colombia</country>
</aff>
<aff id="A02">
<institution><![CDATA[,Universidad Nacional de Colombia Departamento de Ingeniería Eléctrica y Electrónica ]]></institution>
<addr-line><![CDATA[Bogotá ]]></addr-line>
<country>Colombia</country>
</aff>
<aff id="A03">
<institution><![CDATA[,Universidad de La Salle  ]]></institution>
<addr-line><![CDATA[Bogotá ]]></addr-line>
<country>Colombia</country>
</aff>
<pub-date pub-type="pub">
<day>00</day>
<month>09</month>
<year>2016</year>
</pub-date>
<pub-date pub-type="epub">
<day>00</day>
<month>09</month>
<year>2016</year>
</pub-date>
<volume>83</volume>
<numero>198</numero>
<fpage>27</fpage>
<lpage>36</lpage>
<copyright-statement/>
<copyright-year/>
<self-uri xlink:href="http://www.scielo.org.co/scielo.php?script=sci_arttext&amp;pid=S0012-73532016000400003&amp;lng=en&amp;nrm=iso"></self-uri><self-uri xlink:href="http://www.scielo.org.co/scielo.php?script=sci_abstract&amp;pid=S0012-73532016000400003&amp;lng=en&amp;nrm=iso"></self-uri><self-uri xlink:href="http://www.scielo.org.co/scielo.php?script=sci_pdf&amp;pid=S0012-73532016000400003&amp;lng=en&amp;nrm=iso"></self-uri><abstract abstract-type="short" xml:lang="en"><p><![CDATA[The control goal for three-phase pulse width-modulated rectifiers focuses on generating sinusoidal input currents and regulating the DC output voltage. Despite the fact that control strategies such as resonant and repetitive control have been proposed in recent works, with many notable results on the area, they have significant performance decay when the frequency changes in the exogenous signal. In this paper, it is shown that the use of an Odd Harmonic High Order Repetitive Controller can be used to control the three-phase rectifier current loops with a performance that is considerably superior to traditional alternatives developed in this field. This compensator's Odd Harmonic property keeps a computational complexity similar to that of the conventional repetitive controllers but it has the advantage of increasing the robustness when the signal frequency varies. Simulation and experimental results show the high performance that was obtained even in the case of deviation of network frequency from its nominal value.]]></p></abstract>
<abstract abstract-type="short" xml:lang="es"><p><![CDATA[El objetivo de control en rectificadores de potencia trifásicos se basa en generar corrientes de entrada sinusoidales y regular el voltaje de salida DC. Aunque el Control Repetitivo y Resonante son enfoques de control que han presentado excelentes resultados, su principal desventaja se basa en la pérdida considerable de desempeño cuando la frecuencia de la red se desvía de su valor nominal. En este artículo, se presenta el uso de un Controlador Repetitivo Impar de Alto Orden para controlar los lazos de corrientes de un rectificador trifásico con un desempeño considerablemente superior a otras alternativas tradicionalmente implementadas en este campo. Este controlador permite el rechazo de los armónicos impares introducidos en el sistema, lo que mantiene una complejidad computacional similar a la obtenida con los controladores repetitivos convencionales con la ventaja de incrementar la robustez cuando la frecuencia de la señal varíe. Las simulaciones y los resultados experimentales muestran un alto desempeño aún cuando se presenten desviaciones de la frecuencia de la red respecto a su valor nominal.]]></p></abstract>
<kwd-group>
<kwd lng="en"><![CDATA[current control]]></kwd>
<kwd lng="en"><![CDATA[Odd Harmonic High Order Repetitive Controller]]></kwd>
<kwd lng="en"><![CDATA[Three- Phase PWM rectifier]]></kwd>
<kwd lng="es"><![CDATA[Control de Corriente]]></kwd>
<kwd lng="es"><![CDATA[Controlador Repetitivo de Alto Orden Impar]]></kwd>
<kwd lng="es"><![CDATA[Rectificador PWM Trifásico]]></kwd>
</kwd-group>
</article-meta>
</front><body><![CDATA[ <p><font size="1" face="Verdana, Arial, Helvetica, sans-serif"><b>DOI:</b> <a href="http://dx.doi.org/10.15446/dyna.v83n198.53276" target="_blank">http://dx.doi.org/10.15446/dyna.v83n198.53276</a></font></p>     <p align="center"><font size="4" face="Verdana, Arial, Helvetica, sans-serif"><b>High   performance control of a three-phase PWM rectifier using odd harmonic high   order repetitive control</b></font></p>     <p align="center"><i><b><font size="3" face="Verdana, Arial, Helvetica, sans-serif">Control de   alto desempe&ntilde;o de un rectificador PWM trif&aacute;sico usando control repetitivo de   alto orden</font></b></i></p>     <p align="center">&nbsp;</p>     <p align="center"><b><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Germ&aacute;n Ramos <i><sup>a</sup>,</i> Iv&aacute;n Dario Melo-Lagos <i><sup>b </sup></i>&amp;   Jenny Cifuentes <i><sup>c</sup></i></font></b></p>     <p align="center">&nbsp;</p>     <p align="center"><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><sup><i>a </i></sup><i>Departamento de Ingenier&iacute;a El&eacute;ctrica y Electr&oacute;nica, Universidad   Nacional de Colombia, Bogot&aacute;, Colombia. <a href="mailto:garamosf@unal.edu.co">garamosf@unal.edu.co</a>    <br>   <sup>b </sup>Departamento de Ingenier&iacute;a El&eacute;ctrica y Electr&oacute;nica, Universidad   Nacional de Colombia, Bogot&aacute;, Colombia. <a href="mailto:idmelol@unal.edu.co">idmelol@unal.edu.co</a>    <br>   <sup>c </sup>Programa de Ingenier&iacute;a El&eacute;ctrica, Universidad de La Salle, Bogot&aacute;,   Colombia. <a href="mailto:jacifuentesq@unal.edu.co">jacifuentesq@unal.edu.co</a></i></font></p>     <p align="center">&nbsp;</p>     ]]></body>
<body><![CDATA[<p align="center"><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b>Received: September 30<sup>th</sup>,   2015. Received in revised form: April 8<sup>th</sup>, 2016. Accepted: April 24<sup>th</sup>,   2016.</b></font></p>     <p align="center"><font size="1" face="Verdana, Arial, Helvetica, sans-seriff"><b>This work is licensed under a</b> <a rel="license" href="http://creativecommons.org/licenses/by-nc-nd/4.0/">Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License</a>.</font><br />   <a rel="license" href="http://creativecommons.org/licenses/by-nc-nd/4.0/"><img style="border-width:0" src="https://i.creativecommons.org/l/by-nc-nd/4.0/88x31.png" /></a></p> <hr>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b>Abstract    <br>   </b></font><font size="2" face="Verdana, Arial, Helvetica, sans-serif">The control goal for three-phase pulse   width-modulated rectifiers focuses on generating sinusoidal input currents and   regulating the DC output voltage. Despite the fact that control strategies such   as resonant and repetitive control have been proposed in recent works, with   many notable results on the area, they have significant performance decay when   the frequency changes in the exogenous signal. In this paper, it is shown that   the use of an Odd Harmonic High Order Repetitive Controller can be used to   control the three-phase rectifier current loops with a performance that is   considerably superior to traditional alternatives developed in this field. This   compensator's Odd Harmonic property keeps a computational complexity similar to   that of the conventional repetitive controllers but it has the advantage of   increasing the robustness when the signal frequency varies. Simulation and   experimental results show the high performance that was obtained even in the   case of deviation of network frequency from its nominal value.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><i>Keywords</i>: current control; Odd Harmonic High Order Repetitive Controller;   Three- Phase PWM rectifier.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b>Resumen    <br>   </b></font><font size="2" face="Verdana, Arial, Helvetica, sans-serif">El objetivo de   control en rectificadores de potencia trif&aacute;sicos se basa en generar corrientes   de entrada sinusoidales y regular el voltaje de salida DC. Aunque el Control   Repetitivo y Resonante son enfoques de control que han presentado excelentes   resultados, su principal desventaja se basa en la p&eacute;rdida considerable de   desempe&ntilde;o cuando la frecuencia de la red se desv&iacute;a de su valor nominal. En este   art&iacute;culo, se presenta el uso de un Controlador Repetitivo Impar de Alto Orden   para controlar los lazos de corrientes de un rectificador trif&aacute;sico con un   desempe&ntilde;o considerablemente superior a otras alternativas tradicionalmente   implementadas en este campo. Este controlador permite el rechazo de los   arm&oacute;nicos impares introducidos en el sistema, lo que mantiene una complejidad   computacional similar a la obtenida con los controladores repetitivos   convencionales con la ventaja de incrementar la robustez cuando la frecuencia   de la se&ntilde;al var&iacute;e. Las simulaciones y los resultados experimentales muestran un   alto desempe&ntilde;o a&uacute;n cuando se presenten desviaciones de la frecuencia de la red   respecto a su valor nominal.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><i>Palabras clave</i>: Control de Corriente; Controlador Repetitivo   de Alto Orden Impar; Rectificador PWM Trif&aacute;sico.</font></p> <hr>     <p>&nbsp;</p>     <p><font size="3" face="Verdana, Arial, Helvetica, sans-serif"><b>1. Introduction</b></font></p>     ]]></body>
<body><![CDATA[<p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">More recently, reactive power and   harmonic currents generated by power converters have become a crucial issue in   many electric power systems &#91;1&#93;. In this case, diode bridge and phase   controlled bridge rectifiers have been considered as one of the most important   causes of electrical pollution &#91;2&#93;. Although these solutions have been widely   implemented in industrial applications because of their economic advantages,   they begin to look unsustainable due to the impositions of stricter harmonic standards.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Pulse width modulation rectifiers (PWM)   have arisen as a solution to overcome these problems, reducing harmonic   pollution &#91;3,4&#93; and adapting in accordance to the highest requirements for   energy quality &#91;5,6&#93;. Using these   devices, it is possible to control the output voltage and to obtain sinusoidal   ac currents. In order to assess the performance of a three-phase PWM rectifier,   two parameters are taken into account: the Total Harmonic Distortion (THD),   which is a measurement of the harmonic content of the current signal; and the   Power Factor (PF), which accounts for phase differences between the current and   the voltage. With this thread in mind, PWM rectifiers seek a unity PF   and a small THD.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Several strategies have been proposed to   control three-phase PWM rectifiers. In the reported research, multiple   Proportional Integral controllers &#91;7&#93; have been implemented in the current   loops, mainly due to the ease of implementing them as well as their   satisfactory performance. However, the main limitation of this approach lies in   an inherent tracking (amplitude and phase) error &#91;8&#93;.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Over the   last few years, interesting emerging control techniques such as resonant   control &#91;9,10&#93; and repetitive control (RC) &#91;11-13&#93; have been developed to track/reject periodic signals. Good response   characteristics are achieved by using these strategies, ensuring near unit   power factor and constant output dc voltage under parameter uncertainties, as   well as load disturbances. The main disadvantage is related to the lost of   performance caused by variations of the network frequency from its nominal   value &#91;14&#93;.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">In this paper, an odd harmonic HORC   Controller is proposed for the current loops of a three-phase PWM rectifier.   Hence, taking advantage of its inherent properties, only the odd harmonics are   removed. By using this strategy, two aims are achieved: 1) Computational   complexity is substantially reduced by the odd property of this compensator,   which is very similar to that obtained with the conventional repetitive   controllers, and 2) Robustness is increased when the signal frequency varies.   Experimental results show a high performance at nominal frequency, even when   harmonics are present in the voltage source waveforms and have the additional   characteristic of preserving low THD and unitary PF, despite network frequency   variations.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">The paper   is organized as follows: section 2 describes the three-phase PWM rectifier   model, introduces the control objectives, and presents the controller   structure. In Section 3, the structure of an Odd HORC Controller for the   current loops is explained in detail; the control implemented for the voltage   loop is described in Section 4. Section 5 reports experimental results and   demonstrates a comparison to a classical HORC Controller. Finally, in Section 6   we present conclusions and future directions.</font></p>     <p>&nbsp;</p>     <p><font size="3" face="Verdana, Arial, Helvetica, sans-serif"><b>2. System description</b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b><i>2.1. Three-phase PWM rectifier</i></b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">PWM techniques have been widely implemented to control   the outputof power converters as they allow shaping   voltage and/or current waves based on specific applications &#91;15&#93;.</font></p>     ]]></body>
<body><![CDATA[<p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">The   three-phase PWM rectifier circuit, as shown in <a href="#fig01">Fig. 1</a>, has three-legs with IGBT   transistors. It is known as a bi-directional boost rectifier (increasing the   voltage) and works using fixed DC voltage polarity. Input inductors are   an integral part of the rectifier and are selected based on their design &#91;16&#93;.   We achieve harmonic compensation through the input inductors, and we ensure   smooth voltage waveforms by using capacitors. </font></p>     <p align=center><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a name="fig01"></a></font><img src="/img/revistas/dyna/v83n198/v83n198a03fig01.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">The dynamics of the   three-phase PWM rectifier (as shown in <a href="#fig01">Fig. 1</a>) can be described as:</font></p>     <p><img src="/img/revistas/dyna/v83n198/v83n198a03eq0104.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">where <i>L<sub>n</sub>,<sub>, </sub></i>C and <i>R</i><sub>o </sub>are the   nominal values of inductances, the capacitor and the load resistance,   respectively; <i>i<sub>L1</sub></i>, <i>i<sub>L2</sub></i> and <i>i<sub>L3</sub></i> are the phase currents   and <i>V</i><sub>c </sub>is the capacitor   voltage; <i>V</i><sub>in1</sub>, <i>V</i><sub>in2 </sub>and <i>V</i><sub>in3 </sub>are the   known three-phase sinusoidal voltages; <i>V</i><sub>in1</sub>+<i>V</i><sub>in2+</sub><i>V</i><sub>in3</sub>=0; <i>R</i><sub>Ln </sub>is the parasitic inductor resistance for each phase;      +      ; and      is the control action used to trigger the   IGBTs. Their values range within the interval </font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b><i>2.2. Control system structure</i></b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Control   objectives for three-phase PWM rectifier systems are quite similar to the   objectives for the single-phase case. They are focused on achieving unit power   factor, constant output dc voltage and a suitable low harmonics sinusoidal   waveform for the input current. The difference is to be found in the fact that   the control aim for the current loop should be achieved for every phase, taking   into account the shifts associated with a three-phase current flow. </font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a href="#fig02">Fig. 2</a> depicts   the general control system structure. It consists of a double-loop   structure: two inner current loops that ensure a sinusoidal waveform in the   current input, and an outer dc voltage loop designed to regulate the output   voltage and proportionate the active power balance in the system. The voltage   loop gives the amplitude, <i>I<sub>dn</sub>(t)</i>,   of the reference currents that is to be used in the two inner current loops. The reason behind only using two current loops is   that, under the assumption of a balanced system (<i>V</i><sub>in1</sub>+<i>V</i><sub>in2+</sub><i>V</i><sub>in3</sub>=0), the compensation action applied in two phases   will generate the action to be applied for the third phase. Thus, control   action      will be generated form      and      using      , as shown in <a href="#fig02">Fig. 2</a>.</font></p>     <p align="center"><font size="2" face="Verdana, Arial, Helvetica, sans-serif"> <a name="fig02"></a></font><img src="/img/revistas/dyna/v83n198/v83n198a03fig02.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">A PLL (Phase Locked Loop) system takes   the phase voltages and produces sine waves with appropriate phases. These   signals, together with the amplitude <i>I<sub>dn</sub>(t),</i> create the two current references for the current loops.</font></p>     ]]></body>
<body><![CDATA[<p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">In this way, the control system should   track sinusoidal signals with suitable      magnitudes and phases   and reject the system disturbances. Among these disturbances, two are recurrent   in these kinds of systems: low-frequency signals and harmonics generated by   distortions in the network voltage. Due to the fact that symmetrical waveforms   only contain odd harmonics, distortions in the voltage waveform are regularly   found between the 3th and 9th harmonic &#91;17&#93;.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">In addition, in order to keep a constant   output dc voltage, the system should react to changes in the network voltage   and in the rectifier load. Finally, it is worth drawing the reader's attention   to the fact that the voltage control loop uses the average of the measured dc   voltage to avoid introducing its ripple into the loops.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">In this work, an Odd Harmonic High Order   Repetitive Controller is adopted for the current loops in order to compensate   the odd harmonics that are introduced to the system by the network voltage and   increase system robustness to changes in the network frequency. A PI controller   is integrated into the voltage loop for the purpose of achieving an active   power balance and keeping the average value of the output voltage constant.</font></p>     <p>&nbsp;</p>     <p><b><font size="3" face="Verdana, Arial, Helvetica, sans-serif">3. Current control loops </font></b></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">This section describes the Odd Harmonic High   Order Repetitive Controller that is proposed for the current loops. Identical   current control loops are designed for two of the system phases and can be seen   in <a href="#fig02">Fig. 2</a>.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Primarily, the structure of conventional   repetitive control scheme is explained in order to introduce the high-order   controller design.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b><i>3.1. The odd harmonic high order repetitive controller</i></b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Repetitive control (RC) has proven to be   a useful control strategy to track/reject periodic signals &#91;18,19&#93;. Using this   control strategy, the sinusoidal signal references in the current loops are   tracked and the harmonics generated by the network voltage are rejected. In   order to accomplish this, the RC scheme incorporates a generator of periodic   signals (also known as internal model) in the control structure &#91;20&#93;:</font></p>     <p><img src="/img/revistas/dyna/v83n198/v83n198a03eq05.gif"></p>     ]]></body>
<body><![CDATA[<p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">where <i>W(z)</i>is a time delay function, <i>H(z) </i>is a low-pass filter which provides   robustness at high frequencies, and      takes the values 1 or -1 and determines   if the control is applied to all harmonic components;      or      only for odd harmonics. The way in which the   internal model (eq. 5) is added to the control structure will be described in   the next section.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">The standard internal model, used in   repetitive control &#91;21&#93;, can be determined by using <img src="/img/revistas/dyna/v83n198/v83n198a03eq052.gif" />, <img src="/img/revistas/dyna/v83n198/v83n198a03eq053.gif" />, or      with <i>N=T<sub>p</sub>/T<sub>s</sub></i>, where <i>T<sub>p </sub></i> is the period of the signal being tracked/rejected and <i>T<sub>s</sub></i>is the sampling period of the control system. This   model provides infinite gain at fundamental   frequency and all its harmonics until the <i>(N/2-1)-th. </i>Having high gains   at selected frequencies guarantees the tracking/rejecting capability in   closed-loops for signals with this frequency content.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">However, an internal model which only   generates infinite gain at odd-harmonic components &#91;22&#93; can be obtained using <img src="/img/revistas/dyna/v83n198/v83n198a03eq051.gif">.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">The magnitude frequency responses of the standard and odd internal   models are shown in <a href="#fig03">Fig. 3</a>. The sampling period is selected to be <i>T<sub>s</sub>=15 </i>kHz<i>, </i>which yields N=250, and the fundamental frequency is set to 60   Hz. As can be appreciated from the figure, these models generate infinite gain   at fundamental and harmonic frequencies. This establishes a</font><font size="2" face="Verdana, Arial, Helvetica, sans-serif"> very limited   frequency band that is centered around each harmonic component. This feature   currently represents the main disadvantage of standard and odd internal models.   As a result, the standard repetitive control exhibits a considerable loss of   performance when the exogenous signal frequency varies from its nominal value,   even with very small deviations &#91;14&#93;.</font></p>     <p align="center"><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a name="fig03"></a></font><img src="/img/revistas/dyna/v83n198/v83n198a03fig03.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">In this   regard, by modifying the   time delay function <i>W(z), </i>an internal model can provide high   gain over a broader frequency interval around the fundamental and harmonic   modes. This increases the robustness against changes in network frequency.   Accordingly,      ,      , and the time delay function is   given by &#91;5&#93;:</font></p>     <p><img src="/img/revistas/dyna/v83n198/v83n198a03eq06.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">where <i>M </i>denotes the Harmonic High Order Repetitive Controller (HORC). By using this   definition, the internal model (eq. 5) is given by:</font></p>     <p><img src="/img/revistas/dyna/v83n198/v83n198a03eq07.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a href="#fig04">Fig. 4</a> compares the magnitude response of   the internal models used in odd-harmonic RC and odd-harmonic HORC for second   (M=2) and third (M=3) order case; these have a nominal frequency of 60 Hz and a   sampling period of 15 KHz. <a href="#fig04">Fig. 4</a> also highlights the gain of the internal   models designed for nominal frequency deviations of 59.5 and 60.5 Hz and their   corresponding harmonics. It can be seen that the gain is higher for the odd-harmonic   HORC (M=2 and M=3) compared with the odd-harmonic RC (M=1) for the same   frequency variation. This improves the robustness against frequency changes and   the performance under non-ideal operating conditions. However, internal models   with high orders can decrease the robustness due to the elevated gains in the   highest harmonics. Although this problem can be overcome by using a lower   cut-off frequency in the low-pass filter H(z), this could cause performance   decay because of the action reduction in the superior harmonics. For this   reason, a tradeoff between the internal model order M and the filter bandwidth   H(z) is required in order to achieve performance and stability robustness &#91;18,19&#93;.</font></p>     ]]></body>
<body><![CDATA[<p align="center"><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a name="fig04"></a></font><img src="/img/revistas/dyna/v83n198/v83n198a03fig04.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Based on the facts that frequency   variations in the Colombian electric system are quite small (59.8-60.2) &#91;23&#93;   and that it is desirable to keep the distortion as low as possible in the input   current of the rectifier, the Odd Harmonic High Order internal model with M=2   (2ORC) has been experimentally validated as the controller with the best   performance.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">The odd internal model   with the low-pass filter <i>H(z) </i>and <i>M=2</i> becomes:</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Furthermore, it is important to note that   the odd internal model (eq. 8) and the standard repetitive controller are   mostly of the same order, which results in a similar computational   complexity during their implementations. This implies that </font><font size="2" face="Verdana, Arial, Helvetica, sans-serif">standard internal   models and second order odd harmonic internal models with same <i>N</i> parameter would perform almost the   same number of multiplications and additions, and also use the same amount of   memory during an experimental implementation.</font></p>     <p>&nbsp;</p>     <p><img src="/img/revistas/dyna/v83n198/v83n198a03eq08.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b><i>3.2. Repetitive controller structure</i></b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Each current control block shown in <a href="#fig02">Fig.   2</a> has a corresponding repetitive controller, which is as the one shown in <a href="#fig05">Fig.   5</a>. In order to include one of the internal models that were defined in the   previous section, i.e. <i>I(z), I<sub>odd</sub>(z),   or I<sub>2odd</sub>(z)</i> (equations (5), (7) and (8), respectively),   repetitive control is usually implemented using the plug-in configuration   presented in <a href="#fig05">Fig. 5</a>. As can be seen, the internal model (<i>I(z), I<sub>odd</sub>(z) or I<sub>2odd</sub>(z)</i>) is added, as part   of the existing controller <i>G<sub>c</sub>(z)</i>,   and the filter <i>G<sub>x</sub>(z)</i> is   also incorporated. The compensator<i> G<sub>c</sub>(z)</i> is used to stabilize the plant <i>G<sub>p</sub>(z)</i> and to provide disturbance attenuation across the rectifier bandwidth.   Additionally, compensator <i>G<sub>c</sub>(z) </i>should offer good robustness margins, and filter <i>G<sub>x</sub>(z)</i> is designed to ensure system stability in closed   loop. </font></p>     <p align="center"><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a name="fig05"></a></font><img src="/img/revistas/dyna/v83n198/v83n198a03fig05.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">The   transfer function of the plant is obtained from (eq. (1)-(3)), which performs   the variable change      and   causes each phase to result in the following:</font></p>     ]]></body>
<body><![CDATA[<p><img src="/img/revistas/dyna/v83n198/v83n198a03eq09.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">From the discretization of (9) the   following can be obtained:</font></p>     <p><img src="/img/revistas/dyna/v83n198/v83n198a03eq10.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b>Control   action in each phase results in:</b></font></p>     <p><img src="/img/revistas/dyna/v83n198/v83n198a03eq11.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">with <img src="/img/revistas/dyna/v83n198/v83n198a03eq111.gif" /> being the z-transform of <img src="/img/revistas/dyna/v83n198/v83n198a03eq112.gif" /><img src="/img/revistas/dyna/v83n198/v83n198a03eq113.gif" />.      and <img src="/img/revistas/dyna/v83n198/v83n198a05eq114.gif" /><img src="/img/revistas/dyna/v83n198/v83n198a05eq115.gif" />which are the reference signals for   phase 1 and phase 2, respectively. Finally, dutty cycle      is calculated as      and sent to eah PWM generator, as seen in <a href="#fig02">Fig.   2</a>.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b><i>3.3. Stability</i></b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">The   closed-loop system of <a href="#fig05">Fig. 5</a> is stable if the following conditions are   fulfilled &#91;24&#93;:</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">The closed-loop system without the repetitive controller is stable,   which means the transfer function <i>T<sub>o</sub>(z)</i> should be stable:</font></p>     <p><img src="/img/revistas/dyna/v83n198/v83n198a03eq12.gif"></p>     ]]></body>
<body><![CDATA[<p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">1. <img src="/img/revistas/dyna/v83n198/v83n198a03eq121.gif">, where H(z)   and G<sub>x</sub>(z) should be chosen adequately.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Whole system dynamics, shown in <a href="#fig02">Fig. 2</a>, are divided into two parts: fast   dynamics given by the current loop, and slow dynamics represented by the   voltage loop. Therefore, to ensure the convergence of the whole system, two   considerations are assumed: 1) the voltage loop provides very slow changes in   the current reference, and 2) the current loop responds so fast that its   dynamic behavior does not affect the evolution of the voltage loop. In order to   obtain this behavior, the bandwidth of each loop should be properly selected in   order to achieve a sufficient separation to differentiate between both   dynamics. See reference &#91;25&#93; for a more detailed analysis on this topic.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b><i>3.4. Design of filter H(z)</i></b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Filter H(z) is used to limit the   repetitive controller bandwidth, and, as such, it impacts performance, limiting   the number of harmonics that will be taken into consideration. In general, the choice of filter bandwidth   implies a trade-off between stability robustness and performance. Although   numerous optimization techniques to define a conventional filter H(z) have been   proposed, H(z) is chosen to be a null phase low-pass FIR filter &#91;26&#93;.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b><i>3.5. Design of filter G<sub>x</sub>(z)</i></b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">In the event   of a minimum phase systems, <i>G<sub>x</sub>(z)</i> is usually selected as      , while for non minimum phase systems,   it is possible to use the approach proposed in </font><font size="2" face="Verdana, Arial, Helvetica, sans-serif">&#91;21&#93;. Finally, the value of the gain <i>k<sub>r</sub></i> requires a trade-off between stability robustness   and steady state performance &#91;27&#93;.</font></p>     <p>&nbsp;</p>     <p><font size="3" face="Verdana, Arial, Helvetica, sans-serif"><b>4. Voltage control loop </b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Voltage loop control is designed to   achieve an active power balance in the rectifier and to provide the magnitude   of the current reference for the current loops. Given that voltage at the   rectifier output terminal has a waveform that is highly rippled, a low pass   filter is usually applied to obtain a smoother signal. The purpose of this is   to avoid the ripple propagation to the current reference <i>i<sub>d</sub>(t),</i> which would negatively impact    the harmonic distortion of the rectifier input current <i>i<sub>L</sub>(t)</i>. In this work, the low pass filter has been   replaced by an averaging filter that has been tuned at 60 Hz:</font></p>     <p><img src="/img/revistas/dyna/v83n198/v83n198a03eq13.gif"></p>     ]]></body>
<body><![CDATA[<p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">By using this filter, the average voltage   is calculated from the output voltage <img src="/img/revistas/dyna/v83n198/v83n198a03eq131.gif">. </font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Voltage loop structure is shown in <a href="#fig06">Fig.   6</a>. This structure is comprised of two basic components: a feedback control   action, <i>i<sub>dfb</sub></i>, generated by   a PI compensator, and a pre-feeding action <i>i<sub>dff</sub></i><sub>.</sub> The PI controller in the feedback loop will regulate the average value of the   output voltage to the desired value with zero error:</font></p>     <p><img src="/img/revistas/dyna/v83n198/v83n198a03eq14.gif"></p>     <p align="center"><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a name="fig06"></a></font><img src="/img/revistas/dyna/v83n198/v83n198a03fig06.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Moreover, the pre-feeding signal, <i>i<sub>dff</sub></i>, is designed in order to   avoid sudden changes in voltage levels causing transients with high current   peaks. This pre-feeding stage is calculated based on the rectifier power   balance in steady state. As such, the balance between the AC active power and   the DC power is given by:</font></p>     <p><img src="/img/revistas/dyna/v83n198/v83n198a03eq15.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">where <img src="/img/revistas/dyna/v83n198/v83n198a03eq151.gif" />is the peak value of the network voltage, <img src="/img/revistas/dyna/v83n198/v83n198a03eq152.gif" /> is the peak value of the rectifier   input current, <img src="/img/revistas/dyna/v83n198/v83n198a03eq153.gif" />is the average value of the capacitor voltage, <img src="/img/revistas/dyna/v83n198/v83n198a03eq154.gif" />is the average value of the load current,   and       are the rectifier losses. On that basis, the   pre-feeding value can be computed by:</font></p>     <p><img src="/img/revistas/dyna/v83n198/v83n198a03eq16.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">where <img src="/img/revistas/dyna/v83n198/v83n198a03eq155.gif" /> is a factor that weighs the   rectifier losses. As a result, the reference signal amplitude for the current   loop is calculated by:</font></p>     <p><img src="/img/revistas/dyna/v83n198/v83n198a03eq17.gif"></p>     ]]></body>
<body><![CDATA[<p>&nbsp;</p>     <p><font size="3" face="Verdana, Arial, Helvetica, sans-serif"><b>5. Experimental results</b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">In this section the experimental results   are presented and analyzed. Two different setups are defined for nominal and   varying frequency conditions. A comparison of HORC and RC is provided in order   to show the advantages of implementing the odd harmonic HORC.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b><i>5.1. Experimental setup</i></b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">The utility network frequency is 60 Hz,   thus defining a period of Tp=1/60 s. The sampling period is set to Ts=1/15000   s, which corresponds with the PMW switching frequency. As a result, the   discrete period is N=Tp/Ts=250.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">The   transfer function of the plant is obtained from (eq. 10) with <i>L=300</i> mH and <i>R<sub>L</sub>=0.1</i> ohms. The internal controller is <i>G<sub>c</sub>(z)=(6,293z-6,283)/(z-0.998), </i>which   provides enough robustness margins. Filter <i>H(z), </i>which has a good robustness-performance tradeoff, is comprised of <img src="/img/revistas/dyna/v83n198/v83n198a03eq173.gif" /><img src="/img/revistas/dyna/v83n198/v83n198a03eq174.gif" /><img src="/img/revistas/dyna/v83n198/v83n198a03eq175.gif" /><img src="/img/revistas/dyna/v83n198/v83n198a03eq176.gif" /> .   Concurrently <img src="/img/revistas/dyna/v83n198/v83n198a03eq177.gif" />with <i>k<sub>r</sub>=0.7</i>.   A PI controller for the voltage loop defined in (9) takes the values <i>k<sub>p</sub>=0,01</i> and <i>k<sub>i</sub>=0,7</i>.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">For comparison purposes, a conventional   RC with internal model, as in (5), has been designed with <img src="/img/revistas/dyna/v83n198/v83n198a03eq171.gif">, <img src="/img/revistas/dyna/v83n198/v83n198a03eq172.gif">,      and      with <i>k<sub>r</sub>=0,3</i>. </font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Results at nominal frequency are obtained   with the rectifier connected to the grid, and results at different frequencies   are acquired using an AC varying frequency voltage source from PowerSun. In   both cases, a three phase autotransformer is used to provide <i>V<sub>in</sub>=20</i> Vrms to the rectifier.   The three-phase rectifier is a power converter from Semikron, and control   algorithms were implemented in an Intel PC with Matlab XPCTarget real time   software. Bus dc voltage is <i>V<sub>c</sub>=80</i> V with a resistive load of 25 ohms.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b><i>5.2. Nominal frequency performance</i></b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a href="#fig07">Fig. 7</a> shows the response of the non-controlled rectifier. It can be seen that   non-sinusoidal currents with a THD=34.4% are obtained. It is important to note   that Fig. 7 also shows the distortion in the voltage network with 5<sup>th</sup> and 7<sup>th</sup> harmonics with a THD of 4.3 %. This distortion acts as a   disturbance in the current loops.</font></p>     ]]></body>
<body><![CDATA[<p align=center><a name="fig07"></a><img src="/img/revistas/dyna/v83n198/v83n198a03fig07.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a href="#fig08">Fig. 8</a> presents the results   with the proposed odd harmonic HORC. It can be seen that currents now have a   sinusoidal shape in the phase with the voltage source. The THD obtained is 2.2   %. Power factor is presented in <a href="#fig08">Fig. 8</a> in which it can be seen that PF=1 was   obtained.</font></p>     <p align="center"><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a name="fig08"></a></font><img src="/img/revistas/dyna/v83n198/v83n198a03fig08.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">These   results show that odd harmonic HORC satisfies the control objectives, achieving   a low THD and unitary power factor, even in the case of distortion in the   voltage source. Based on its definition, conventional RC should also achieve   the same performance. However, since HORC provides smaller robustness margins,   the cut-off frequency of filter <i>H(z)</i> is usually smaller than the one selected for RC. This entails a slight   performance reduction that appears as a small THD degradation. <a href="#fig09">Fig. 9</a> shows the   THD obtained with RC under the same conditions.</font></p>     <p align="center"><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a name="fig09"></a></font><img src="/img/revistas/dyna/v83n198/v83n198a03fig09.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b><i>5.3. Varying frequency performance</i></b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">These experiments use an AC voltage   source that comes from PowerSun and has a configurable frequency. <a href="#fig10">Fig. 10</a> depicts the current waveforms when the source frequency is 62 Hz and uses   conventional RC. The distortion of the obtained currents can be seen with a   THD=5 % with 5<sup>th</sup> and 7<sup>th</sup> harmonics. Also, the degradation   of the power factor is now present with PF=0.98.</font></p>     <p align="center"><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a name="fig10"></a></font><img src="/img/revistas/dyna/v83n198/v83n198a03fig10.gif"></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Using odd harmonic HORC yields, a   significantly better performance can be seen in <a href="#fig11">Fig. 11</a>. The obtained THD and   PF are 3.8 % and 1, respectively.</font></p>     <p align="center"><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a name="fig11"></a></font><img src="/img/revistas/dyna/v83n198/v83n198a03fig11.gif"></p>     ]]></body>
<body><![CDATA[<p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Similar   behavior is expected at lower frequencies. <a href="#fig12">Fig. 12</a> and <a href="#fig13">Fig. 13</a> present the THD   and phasor diagram results for 59 Hz for RC and HORC, respectively. It can be   seen that HORC performs better with a lower THD and a smaller current phase   deviation.</font></p>     <p align="center"><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a name="fig12"></a></font><img src="/img/revistas/dyna/v83n198/v83n198a03fig12.gif"></p>     <p align="center"><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><a name="fig13"></a></font><img src="/img/revistas/dyna/v83n198/v83n198a03fig13.gif"></p>     <p>&nbsp;</p>     <p><font size="3" face="Verdana, Arial, Helvetica, sans-serif"><b>6. Conclusion</b></font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">This work has proposed an odd harmonic HORC has for the current control   loops in a three phase-PMW power rectifier. Experimental validation has shown   that the proposed controller achieves high performance with THD=1.7% and a   unitary PF. Compared to conventional RC, the HORC has the advantage of   providing higher robustness against network frequency variations. This   characteristic allows the rectifier to accomplish the more demanding standards of power quality, even under varying frequency conditions.</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif">Despite being a high order controller, it   was found that odd harmonic HORC has a similar computational burden when it was   compared to a full- harmonic RC.</font></p>     <p>&nbsp;</p>     <p><font size="3" face="Verdana, Arial, Helvetica, sans-serif"><b>References</b></font></p>     <!-- ref --><p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b>&#91;1&#93;</b> Pe&ntilde;a-Huaringa, O.J., Studying   and simulating transformer configuration to improve power quality. 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DOI:   10.1115/1.2900676</font>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=1141695&pid=S0012-7353201600040000300026&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --><!-- ref --><p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b>&#91;27&#93;</b> Hillerström, G. and Lee,   R.C.H., Trade-offs in repetitive control, University of Cambridge,   CUED/F-INFENG/TR 294, 1997.    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=1141696&pid=S0012-7353201600040000300027&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --></font></p>     <p>&nbsp;</p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b>G.A. Ramos,</b> received his BSc in   Electrical Engineering in 1999 and his MSc degree in Industrial Automation in   2006, both from the Universidad Nacional de Colombia, Bogot&aacute;, Colombia. He   obtained his PhD in Automatics in 2012, from Universitat Politècnica de   Catalunya, Barcelona, Spain. He is currently is an Associate Professor in the   Electrical and Electronic Department, Facultad de Ingenier&iacute;a, Universidad   Nacional de Colombia. His research interests include: control theory, control   applied to power converters, repetitive control and active disturbance   rejection control. ORCID: 0000-0003-1393-6943</font></p>     ]]></body>
<body><![CDATA[<p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b>I.D. Melo Lagos</b>, received his BSc in   Telematics Engineering in 2008 from the University Distrital Francisco Jose de   Caldas, Bogot&aacute;, Colombia, and his BSc in Electrical Engineering in 2010 from   the Universidad Nacional de Colombia. In the years 2010-2015 he worked in the   area of the design of power electronics equipment, in the CDP and Powersun   groups. In 2015 he finished his MSc studies of in industrial automation at the   Universidad Nacional de Colombia. His research interests include: control   theory applied to power electronics. ORCID: 0000-0002-5818-5808</font></p>     <p><font size="2" face="Verdana, Arial, Helvetica, sans-serif"><b>J.A. Cifuentes,</b> received her   BSc in Mechatronics Engineering in 2008, her MSc. degree in Industrial   Automation in 2010, both from the Universidad Nacional de Colombia, Bogot&aacute;,   Colombia. She was awarded a PhD in Industrial Automation from the Institute   National des Sciences Aplique&eacute;s de Lyon (INSA), France and a PhD in Mechanical   and Mechatronics Engineering from the Universidad Nacional de Colombia, Bogot&aacute;,   Colombia in 2015. She is currently an   Associate Professor in the program of Electrical Engineering, Facultad de   Ingenier&iacute;a, Universidad de la Salle. Her   research interests include: Modeling and analysis of dynamic systems, Signal   Processing, Biomedical Signal Classification, and Gesture Acquisition. ORCID: 0000-0001-7421-291X</font></p>      ]]></body><back>
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